1. Field of the Invention
The present invention relates to a coding and decoding method through the calculation of syndromes based on information symbols and, particularly, to a coding and decoding method intended for an error correction code.
2. Description of the Prior Art
FIG. 1 shows a block diagram of a conventional coding and decoding circuit which implements coding and decoding for the Reed-Solomon code, as disclosed for example in publication entitled "Theory of Coding" published by K. K. Shoko-Do on Sept. 20, 1973. In the figure, an input terminal 1 for information symbols for coding is connected to a retardation shift register 5 and the input of a syndrome calculation circuit 9. An output terminal 2 for codewords at coding is connected to the common contact of an output selector switch 6 for selecting an output of the information section or check symbol section. An input terminal 3 for received words at decoding is connected to a retardation shift register 7 for decoding and the input of the syndrome calculation circuit 9. An output terminal 4 for corrected information symbols at decoding is connected to the output of an adder 8 of finite field. The output of the retardation shift register 5 at coding is connected to the output selector switch 6. The output of the retardation shift register 7 at decoding is connected to one input of the adder 8, which has another input connected to the output of an error value calculation circuit 13. The syndrome calculation circuit 9 has its output connected to the input of a check symbol calculation circuit 10 and the input of an error location polynomial and error value polynomial generation circuit 11. The check symbol calculation circuit 10 has its output connected to another input contact of the output selector switch 6. The error location polynomial and error value polynomial generation circuit 11 has its outputs connected to the inputs of the error value calculation circuit 13 and the inputs of Chien's search algorithm circuit 12 for obtaining the roots of error location polynomial. The Chien's search algorism algorithm circuit 12 has an output connected to the input of the error value calculation circuit 13. A control circuit 14 for the overall coding/decoding circuit is in connection with the output selector switch 6, syndrome calculation circuit 9, check symbol calculation circuit 10, error location polynomial/error value polynomial generation circuit 11, Chien's search algorism circuit 12 and error value calculation circuit 13, so as to control this switch and circuits.
FIG. 2 is a detailed schematic diagram of the syndrome calculation circuit 9 shown in FIG. 1. In the figure, each AND gate 18 has its one input connected to an input terminal 15 for an information symbol at coding or received word at decoding, and another input connected to an input terminal 16 for the control signal used to make the check symbol section "0" at coding. The input terminals 15 and AND gates 18 are connected through eight lead wires. While for simplicity only one AND gate 18 has been shown in FIG. 1, in practice a plurality of AND gates are employed in the circuit, specifically, in the present circuit eight AND gates as indicated by the preceding sentence. The outputs of the AND gates 18 are connected to one inputs of adders 19 for finite field of t in number. Each of the adders 19 of t in number has another input connected to the output of a corresponding one of constant multiplying circuits 20 (X.alpha..sup.0), (X.alpha..sup.1), . . . , (X.alpha..sup.t-1) of t in number for a finite field. The output of each adder 19 is connected to the input terminal D of each of syndrome calculation registers 21 of t in number, which have output terminals Q connected to the inputs of the constant multiplying circuits 20 and to one input of syndrome outputting 3-state buffers 22. The 3-state buffers 22 of t in number have their outputs connected to the syndrome output terminals 17. A control circuit 23 has its one output connected to the inputs Reset terminal R of the syndrome calculation registers 21 and to another input of each of the 3-state buffers 22.
FIG. 3 shows in flowchart the coding operation. The following describes the conventional coding/decoding method based on the foregoing conventional coding/decoding circuit.
In the coding operation, an information symbol to be coded is entered through the input terminal 1 in FIG. 1, as shown by step 502 in the flowchart of FIG. 3.
Subsequently, in step 503, the information symbol is fed to the syndrome calculation circuit 9, so that syndromes are calculated based on the information symbol. The information symbol is also fed to the retardation register 5 for coding. In step 504, the syndrome produced by the syndrome calculation circuit 9 is entered to the check symbol calculation circuit 10 so that the check symbol is calculated.
In the next step 505, the information symbol released from the coding retardation shift register 5 is delivered as a codeword by way of the output selector switch 6 to the output terminal 2. When output of the information symbol has been completed, the control circuit 14 operates on the output selector switch 6 by the control signal to select the check symbol calculation circuit 10 so that the check symbol is delivered to the codeword output terminal, thereby completing the output of codeword, and the coding operation is terminated.
The above syndrome calculation will further be described with reference to FIG. 2. At the beginning of syndrome calculation, the control circuit 23 applies the control signal to the input terminal R of the syndrome calculation registers 21 so that they are cleared. After that, a high-level signal is entered to the control signal output terminal 16 so as to enable the AND gates 18, and dat of received word or information symbol intended to implement syndrome calculation is entered to the input terminal 15. The multipliers 20 and adders 19 for finite field calculate syndromes from the input data, and accumulate the results in the syndrome calculation registers 21. In case only information symbols have been entered, a low-level signal is entered through the control signal input terminal 16 at the section corresponding to the check symbol, thereby disabling the AND gates 18, so that all symbols corresponding to the check symbol are made "0". The calculated syndromes are delivered sequentially to the output terminal 17 by way of the syndrome outputting 3-state buffers 22.
In the foregoing conventional coding/decoding method, when information symbols are of all "0", the coding results in all-"0" data for the codeword. The presence of a codeword with all-"0" data causes the system to judge at decoding that a correct received word with all information symbols being "0" has been entered, even though the event of all-"0" might be derived from a fault of an external circuit, and as a problem the conventional method lacks in means for determining a faulty external circuitry.